
/*-------------------------------- Arctic Core ------------------------------
 * Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
 * Contact: <contact@arccore.com>
 * 
 * You may ONLY use this file:
 * 1)if you have a valid commercial ArcCore license and then in accordance with  
 * the terms contained in the written license agreement between you and ArcCore, 
 * or alternatively
 * 2)if you follow the terms found in GNU General Public License version 2 as 
 * published by the Free Software Foundation and appearing in the file 
 * LICENSE.GPL included in the packaging of this file or here 
 * <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
 *-------------------------------- Arctic Core -----------------------------*/

/* Generator version: 7.0.0
 * AUTOSAR version:   4.3.0
 */

#include "Port.h"




static const ArcPort_InputSelectConfigType PortInputSelectConfigData[] = {
#ifdef INPUT_SELECT_PORT_PIN_MODE_CAN_PAD_49
	INPUT_SELECT_PORT_PIN_MODE_CAN_PAD_49, /* PCR	49	: PORT_PIN_MODE_CAN */
#endif
#ifdef INPUT_SELECT_PORT_PIN_MODE_OTHER3_PAD_50
	INPUT_SELECT_PORT_PIN_MODE_OTHER3_PAD_50, /* PCR	50	: PORT_PIN_MODE_OTHER3 */
#endif
#ifdef INPUT_SELECT_PORT_PIN_MODE_OTHER1_PAD_57
	INPUT_SELECT_PORT_PIN_MODE_OTHER1_PAD_57, /* PCR	57	: PORT_PIN_MODE_OTHER1 */
#endif
#ifdef INPUT_SELECT_PORT_PIN_MODE_SPI_PAD_63
	INPUT_SELECT_PORT_PIN_MODE_SPI_PAD_63, /* PCR	63	: PORT_PIN_MODE_SPI */
#endif
#ifdef INPUT_SELECT_PORT_PIN_MODE_SPI_PAD_69
	INPUT_SELECT_PORT_PIN_MODE_SPI_PAD_69, /* PCR	69	: PORT_PIN_MODE_SPI */
#endif
#ifdef INPUT_SELECT_PORT_PIN_MODE_OTHER2_PAD_93
	INPUT_SELECT_PORT_PIN_MODE_OTHER2_PAD_93, /* PCR	93	: PORT_PIN_MODE_OTHER2 */
#endif
	{PORT_INVALID_REG, 0u} /* end marker */
};

/*lint -save -e835 -e9027 -e845 FALSE POSITIVE Zero given as right argument to | is okay (Generated code and depending on the defines this is true for some defines) */ 
static const ArcPort_PadConfigType PortPadConfigData[] = {
	{48, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(48, PORT_PIN_MODE_CAN, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	48	: PORT_PIN_MODE_CAN */
	{49, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(49, PORT_PIN_MODE_CAN, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  )}, /* PCR	49	: PORT_PIN_MODE_CAN */
	{50, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(50, PORT_PIN_MODE_OTHER3, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  )}, /* PCR	50	: PORT_PIN_MODE_OTHER3 */
	{52, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(52, PORT_PIN_MODE_DIO, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	52	: PORT_PIN_MODE_DIO */
	{53, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(53, PORT_PIN_MODE_DIO, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	53	: PORT_PIN_MODE_DIO */
	{56, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(56, PORT_PIN_MODE_OTHER1, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	56	: PORT_PIN_MODE_OTHER1 */
	{57, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(57, PORT_PIN_MODE_OTHER1, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  )}, /* PCR	57	: PORT_PIN_MODE_OTHER1 */
	{60, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(60, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	60	: PORT_PIN_MODE_SPI */
	{61, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(61, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	61	: PORT_PIN_MODE_SPI */
	{62, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(62, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	62	: PORT_PIN_MODE_SPI */
	{63, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(63, PORT_PIN_MODE_SPI, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  )}, /* PCR	63	: PORT_PIN_MODE_SPI */
	{64, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(64, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	64	: PORT_PIN_MODE_SPI */
	{65, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(65, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	65	: PORT_PIN_MODE_SPI */
	{67, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(67, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	67	: PORT_PIN_MODE_SPI */
	{68, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(68, PORT_PIN_MODE_SPI, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	68	: PORT_PIN_MODE_SPI */
	{69, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(69, PORT_PIN_MODE_SPI, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  )}, /* PCR	69	: PORT_PIN_MODE_SPI */
	{80, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(80, PORT_PIN_MODE_DIO, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	80	: PORT_PIN_MODE_DIO */
	{92, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(92, PORT_PIN_MODE_OTHER2, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	92	: PORT_PIN_MODE_OTHER2 */
	{93, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(93, PORT_PIN_MODE_OTHER2, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  )}, /* PCR	93	: PORT_PIN_MODE_OTHER2 */
	{95, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(95, PORT_PIN_MODE_DIO, 0) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  )}, /* PCR	95	: PORT_PIN_MODE_DIO */
	{97, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(97, PORT_PIN_MODE_DIO, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	97	: PORT_PIN_MODE_DIO */
	{101, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(101, PORT_PIN_MODE_DIO, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MAX | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	101	: PORT_PIN_MODE_DIO */
	{102, STD_OFF, STD_OFF, (PIN_FUNCTION_REG(102, PORT_PIN_MODE_DIO, 1) | PORT_IBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE  | PORT_OUTPUT )}, /* PCR	102	: PORT_PIN_MODE_DIO */
	{PORT_INVALID_REG, STD_OFF, STD_OFF, 0u} /* end marker */
};
/*lint -restore */


static const ArcPort_OutConfigType PortOutConfigData[] = {
	{52u, PORT_GPDO_RESET}, /* GPDO	52 */
	{53u, PORT_GPDO_RESET}, /* GPDO	53 */
	{80u, PORT_GPDO_RESET}, /* GPDO	80 */
	{97u, PORT_GPDO_RESET}, /* GPDO	97 */
	{101u, PORT_GPDO_RESET}, /* GPDO	101 */
	{102u, PORT_GPDO_RESET}, /* GPDO	102 */
	{PORT_INVALID_REG, 0u} /* end marker */
};



const Port_ConfigType PortConfigData =
{
  .padConfig = PortPadConfigData,
  .outConfig = PortOutConfigData,
  .inputSelectConfig = PortInputSelectConfigData
};


